Hi Sergei,
On Fri, Sep 27, 2019 at 8:09 PM Sergei Shtylyov
<sergei.shtylyov@xxxxxxxxxxxxxxxxxx> wrote:
> I was unable to get clk_set_rate() setting a lower RPC-IF clock frequency
> and that issue boiled down to me not passing CLK_SET_RATE_PARENT flag to
> clk_register_composite() when registering the RPC[D2] clocks...
>
> Fixes: db4a0073cc82 ("clk: renesas: rcar-gen3: Add RPC clocks")
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
Thanks for your patch!
LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Now, before I apply this: does this make RPC-IF work?
> --- renesas.orig/drivers/clk/renesas/rcar-gen3-cpg.c
> +++ renesas/drivers/clk/renesas/rcar-gen3-cpg.c
> @@ -464,7 +464,8 @@ static struct clk * __init cpg_rpc_clk_r
>
> clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
> &rpc->div.hw, &clk_divider_ops,
> - &rpc->gate.hw, &clk_gate_ops, 0);
> + &rpc->gate.hw, &clk_gate_ops,
> + CLK_SET_RATE_PARENT);
> if (IS_ERR(clk)) {
> kfree(rpc);
> return clk;
> @@ -500,7 +501,8 @@ static struct clk * __init cpg_rpcd2_clk
>
> clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
> &rpcd2->fixed.hw, &clk_fixed_factor_ops,
> - &rpcd2->gate.hw, &clk_gate_ops, 0);
> + &rpcd2->gate.hw, &clk_gate_ops,
> + CLK_SET_RATE_PARENT);
> if (IS_ERR(clk))
> kfree(rpcd2);
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
