Hi Wolfram-san, > From: Wolfram Sang, Sent: Wednesday, September 18, 2019 7:50 AM <snip> > > In HS400 timing mode selection, SD clock is switched like: > > 1) HS200 (200MHz) for tuning > 2) High Speed (<= 52MHz) for select HS400 mode (card) > 3) HS400 (200MHz) > > The SDHI controller needs its internal SCC component for HS400 and other > modes which need tuning. However, SCC gets only fed a clock when the > module clk is > 100MHz. Make sure the SCC is always active with tuning > by enforcing at least 100MHz. Note that we only change the module clock. > An internal divider ensures that we will still talk to the card at > 52MHz. > > Signed-off-by: Takeshi Saito <takeshi.saito.xv@xxxxxxxxxxx> > [wsa: don't overwrite 'new_freq', use 'mmc_doing_retune', improve docs] > Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> > --- > > Shimoda-san: can you forward this patch to the BSP team to have a look, > too? I needed to change their version of checking various MMC_TIMING_* > constants because this approach did not work with current mainline for > me. After some testing and researching, I think the solution with > 'mmc_doing_retune' is not only working again, but also more future > proof, in general. I asked the BSP team about this topic, and then they have a concern about the retune. Since they would like to check whether the software is doing tune or not, just tuning situation is lacking on this patch. So, if MMC subsystem has such a new flag as "doing_tune" in struct mmc_host, it's helpful for it. (Also, perhaps it's helpful for adding extra quirks on this driver in the future). What do you think? Best regards, Yoshihiro Shimoda
