On Wed, Aug 21, 2019 at 02:46:00PM +0200, Geert Uytterhoeven wrote: > ARM Erratum 814220 affects Cortex-A7 revisions r0p2-r0p5. > > Enable automatically support to mitigate the erratum when compiling a > kernel for any of the affected Renesas SoCs: > - R-Mobile APE6: r0p2, > - RZ/G1E: r0p5, > - RZ/G1C: r0p5, > - R-Car H2: r0p3, > - R-Car E2: r0p5, > - RZ/N1: r0p5. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx> > --- > drivers/soc/renesas/Kconfig | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig > index 2bbf49e5d441808b..a72d014ea37cc788 100644 > --- a/drivers/soc/renesas/Kconfig > +++ b/drivers/soc/renesas/Kconfig > @@ -72,6 +72,7 @@ config ARCH_R8A73A4 > bool "R-Mobile APE6 (R8A73A40)" > select ARCH_RMOBILE > select ARM_ERRATA_798181 if SMP > + select ARM_ERRATA_814220 > select HAVE_ARM_ARCH_TIMER > select RENESAS_IRQC > > @@ -95,11 +96,13 @@ config ARCH_R8A7744 > config ARCH_R8A7745 > bool "RZ/G1E (R8A77450)" > select ARCH_RCAR_GEN2 > + select ARM_ERRATA_814220 > select SYSC_R8A7745 > > config ARCH_R8A77470 > bool "RZ/G1C (R8A77470)" > select ARCH_RCAR_GEN2 > + select ARM_ERRATA_814220 > select SYSC_R8A77470 > > config ARCH_R8A7778 > @@ -117,6 +120,7 @@ config ARCH_R8A7790 > bool "R-Car H2 (R8A77900)" > select ARCH_RCAR_GEN2 > select ARM_ERRATA_798181 if SMP > + select ARM_ERRATA_814220 > select I2C > select SYSC_R8A7790 > > @@ -143,11 +147,13 @@ config ARCH_R8A7793 > config ARCH_R8A7794 > bool "R-Car E2 (R8A77940)" > select ARCH_RCAR_GEN2 > + select ARM_ERRATA_814220 > select SYSC_R8A7794 > > config ARCH_R9A06G032 > bool "RZ/N1D (R9A06G032)" > select ARCH_RZN1 > + select ARM_ERRATA_814220 > > config ARCH_SH73A0 > bool "SH-Mobile AG5 (R8A73A00)" > -- > 2.17.1 >
