On Thu, Jul 18, 2019 at 08:45:11PM +0900, Magnus Damm wrote: > From: Magnus Damm <damm+renesas@xxxxxxxxxxxxx> > > The R-Car Gen3 SoCs so far come with a total for 4 on-chip CMT devices: > - CMT0 > - CMT1 > - CMT2 > - CMT3 > > CMT0 includes two rather basic 32-bit timer channels. The rest of the on-chip > CMT devices support 48-bit counters and have 8 channels each. > > Based on the data sheet information "CMT2/3 are exactly same as CMT1" > it seems that CMT2 and CMT3 now use the CMT1 compat string in the DTSI. > > Clarify this in the DT binding documentation by describing R-Car Gen3 and > RZ/G2 CMT1 as "48-bit CMT devices". > > Signed-off-by: Magnus Damm <damm+renesas@xxxxxxxxxxxxx> > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > Reviewed-by: Rob Herring <robh@xxxxxxxxxx> Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>
