Hello Wolfram,
Thank you for your patch!
> From: linux-renesas-soc-owner@xxxxxxxxxxxxxxx <linux-renesas-soc-owner@xxxxxxxxxxxxxxx> On Behalf Of Wolfram Sang
> Sent: 04 June 2019 16:15
> Subject: [PATCH 1/3] mmc: sdhi: disallow HS400 for M3-W ES1.2 and V3H
>
> Our HW engineers informed us that HS400 is not working on these SoC
> revisions.
>
> Fixes: 0f4e2054c971 ("mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W ES1.[012]")
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> ---
>
> This one should go back to stable.
>
> drivers/mmc/host/renesas_sdhi_core.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
> index db73f9f1b186..e98ba6cf6c13 100644
> --- a/drivers/mmc/host/renesas_sdhi_core.c
> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -620,11 +620,17 @@ static const struct renesas_sdhi_quirks sdhi_quirks_h3_es2 = {
> .hs400_4taps = true,
> };
>
> +static const struct renesas_sdhi_quirks sdhi_quirks_nohs400 = {
> + .hs400_disabled = true,
> +};
> +
> static const struct soc_device_attribute sdhi_quirks_match[] = {
> { .soc_id = "r8a7795", .revision = "ES1.*", .data = &sdhi_quirks_h3_m3w_es1 },
> { .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_h3_es2 },
> { .soc_id = "r8a7796", .revision = "ES1.0", .data = &sdhi_quirks_h3_m3w_es1 },
> { .soc_id = "r8a7796", .revision = "ES1.1", .data = &sdhi_quirks_h3_m3w_es1 },
> + { .soc_id = "r8a7796", .revision = "ES1.2", .data = &sdhi_quirks_h3_m3w_es1 },
Can we actually detect E1.2 on the M3-W? My understanding is that the content of the
PRR is the same for 1.1 and 1.2 (Geert, could you please jump in?).
I am saying this because I am using an RZ/G2M (r8a774a1), revision 1.2, that it's reporting
itself as 1.1.
Also, the r8a774a1 and r8a7796 are identical (even revision-wise), so I guess we could
add r8a774a1 to the pile while at it?
Thanks,
Fab
> + { .soc_id = "r8a77980", .data = &sdhi_quirks_nohs400 },
> { /* Sentinel. */ },
> };
>
> --
> 2.11.0
