RE: [PATCH v2] watchdog: renesas_wdt: Add a few cycles delay

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Hi Wolfram-san,

> From: Wolfram Sang, Sent: Monday, June 3, 2019 10:04 PM
> On Mon, Jun 03, 2019 at 07:36:01PM +0900, Yoshihiro Shimoda wrote:
> > According to the hardware manual of R-Car Gen2 and Gen3,
> > software should wait a few RLCK cycles as following:
> >  - Delay 2 cycles before setting watchdog counter.
> >  - Delay 3 cycles before disabling module clock.
> >
> > So, this patch adds such delays.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> 
> Despite minor nits:
> 
> Reviewed-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>

Thank you for your review!

> > +static void rwdt_wait(struct rwdt_priv *priv, unsigned int cycles)
> 
> I'd think 'rwdt_wait_cycles' would be a more precise name for this
> function.
> 
> > +	unsigned long delays;
> 
> Why not just 'delay'?

Ah, in v1, periods value existed. So, for consistence, I named "delay".
But, I think we should just "delay" in this case. I'll fix it.

> > +	/* Delay 3 cycles before disabling module clock */
> 
> I like the comments explaining why it is needed.

I think so!

Best regards,
Yoshihiro Shimoda





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