On 05/21/2019 10:19 AM, Mason Yang wrote: > Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. > > Signed-off-by: Mason Yang <masonccyang@xxxxxxxxxxx> > --- > .../devicetree/bindings/mfd/renesas-rpc-if.txt | 65 ++++++++++++++++++++++ > 1 file changed, 65 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/renesas-rpc-if.txt > > diff --git a/Documentation/devicetree/bindings/mfd/renesas-rpc-if.txt b/Documentation/devicetree/bindings/mfd/renesas-rpc-if.txt > new file mode 100644 > index 0000000..20ec85b > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/renesas-rpc-if.txt > @@ -0,0 +1,65 @@ > +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings > +--------------------------------------------------------- > + > +RPC-IF supports both SPI NOR and HyperFlash (CFI-compliant flash) > + > +Required properties: > +- compatible: should be an SoC-specific compatible value, followed by > + "renesas,rcar-gen3-rpc" as a fallback. > + supported SoC-specific values are: > + "renesas,r8a77995-rpc" (R-Car D3) > +- reg: should contain three register areas: > + first for RPC-IF registers, > + second for the direct mapping read mode and > + third for the write buffer area. > +- reg-names: should contain "regs", "dirmap" and "wbuf" > +- clocks: should contain 1 entries for the module's clock > +- clock-names: should contain "rpc" > +- power-domains: should contain system-controller(sysc) for power-domain-cell > +- resets: should contain clock pulse generator(cpg) for reset-cell, > + power-domain-cell and clock-cell That's just some nonsense, sorry... I suggest that you stop reposting your patches as I'm going to post my version of this patchset RSN (based on your patches, of course) and I'm going to take care of fixing this file as well. > +- #address-cells: should be 1 > +- #size-cells: should be 0 [...] MBR, Sergei
