Document the USB_X1 input and add clock-names to identify functional and USB_X1 clocks. Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx> --- v3: * added clock names v2: * removed 'use_usb_x1' option * document that 'usb_x1' clock node will be detected to determine if 48MHz clock exists --- Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt index d46188f450bf..ca8a831d4273 100644 --- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt +++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt @@ -28,7 +28,11 @@ Required properties: followed by the generic version. - reg: offset and length of the partial USB 2.0 Host register block. -- clocks: clock phandle and specifier pair(s). +- clocks: clock phandle and specifier pair(s). For SoCs that have a separate + dedicated USB_X1 input for the PLL, that is also listed. +- clock-names: Name of the clocks. The functional clock shall be called "fclk" + and USB_X1 shall be called "usb_x1". If only one clock is listed, + this property is not required. - #phy-cells: see phy-bindings.txt in the same directory, must be <1> (and using <0> is deprecated). -- 2.16.1
