Document the optional renesas,uses_usb_x1 property. Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx> --- v2: * removed 'use_usb_x1' option * document that 'usb_x1' clock node will be detected to determine if 48MHz clock exists --- Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt index d46188f450bf..79d8360d92e5 100644 --- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt +++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt @@ -28,7 +28,9 @@ Required properties: followed by the generic version. - reg: offset and length of the partial USB 2.0 Host register block. -- clocks: clock phandle and specifier pair(s). +- clocks: clock phandle and specifier pair(s). For SoCs that have a separate + dedicated 48MHz USB_X1 input, if a 'usb_x1' clock node exists and is + set to non-zero, the PHY will use the 48MHZ input for the PLL. - #phy-cells: see phy-bindings.txt in the same directory, must be <1> (and using <0> is deprecated). -- 2.16.1
