On 04/18/2019 07:55 PM, Sergei Shtylyov wrote: >>>> > > Document the bindings used by the Renesas R-Car Gen3 RPC-IF >>> MFD controller. >>>> > > >>>> > > Signed-off-by: Mason Yang <masonccyang@xxxxxxxxxxx> >>>> > > --- >>>> > > .../devicetree/bindings/mfd/mfd-renesas-rpc.txt | 37 +++++++++ >>>> > +++++++++++++ >>>> > > 1 file changed, 37 insertions(+) >>>> > > create mode 100644 Documentation/devicetree/bindings/mfd/mfd- >>>> > renesas-rpc.txt >>>> > > >>>> > > diff --git a/Documentation/devicetree/bindings/mfd/mfd-renesas- >>>> > rpc.txt b/Documentation/devicetree/bindings/mfd/mfd-renesas-rpc.txt >>>> > > new file mode 100644 >>>> > > index 0000000..bfb3d29 >>>> > > --- /dev/null >>>> > > +++ b/Documentation/devicetree/bindings/mfd/mfd-renesas-rpc.txt >>>> > > @@ -0,0 +1,37 @@ >>>> > > +Renesas R-Car Gen3 RPC-IF MFD controller Device Tree Bindings >>>> > > +------------------------------------------------------------- >>>> > > + >>>> > > +Required properties: >>>> > > +- compatible: should be an SoC-specific compatible value, followed by >>>> > > + "renesas,rcar-gen3-rpc" as a fallback. >>>> > > + supported SoC-specific values are: >>>> > > + "renesas,r8a77995-rpc" (R-Car D3) >>>> > > +- reg: should contain 2 entries, one for the base address of rpc- >>>> > if registers, >>>> > > + and one for the direct mapping area >>>> > > +- reg-names: should contain "regs", and "dirmap" >>>> > >>>> > The device tree describes the hardware, not the driver. Why >>> did you remove >>>> > the "wbuf" area? >>>> >>>> I don't think we should describe the hardware that driver did not >>> implement it >>>> because there are still many RPC registers we don't use them. >>> >>> I have to repeat: we describe the hardware, not the driver capabilities. >> >> how about: >> >> - reg: should contain three register areas: >> first for the base address of rpc-if registers, >> second for the direct mapping read mode and >> third for an optional write buffer area. >> - reg-names: should contain "regs", "dirmap" and "wbuf"(optional). >> >> is it OK ? > > No, the write buffer area is always there, at least on the gen3 chips. > (I forgot which other Renesas SoC has RPC-IF as well). So it was RZ/A1. But it didn't have the HyperFlash mode... >> thanks & best regards, >> Mason MBR, Sergei
