Re: [PATCH/RFC] arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps

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On Mon, Apr 08, 2019 at 10:31:48AM +0200, Simon Horman wrote:
> * According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
>   August 24, 2018, the TX clock internal delay mode isn't supported
>   on R-Car E3 (r8a77990) and D3 (r8a77995).
> 
> * TX clock internal delay mode is required for reliable 1Gbps communication
>   using the KSZ9031RNX phy present on the Ebisu and Draak boards.

Hi Simon

My reading of the KSZ9031RNX datasheet suggests the PHY can perform
the delays. MMD address 2h, Register 8h - RGMII Clock Pad Skew.

The PHY driver might even have the needed vendor specific DT
properties.

Have you look at using this?

     Andrew



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