Re: [PATCH 1/5] clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCI

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Hi Simon,

On Fri, Mar 29, 2019 at 10:03 AM Simon Horman <horms@xxxxxxxxxxxx> wrote:
> On Wed, Mar 27, 2019 at 01:41:36PM +0100, Geert Uytterhoeven wrote:
> > From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@xxxxxxxxxxx>
> >
> > According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
> > Hardware Manual Rev. 0.61, the parent clock of the EHCI/OHCI module
> > clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.
> >
> > Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@xxxxxxxxxxx>
> > [takeshi: Update R-Car H3, M3-N, and E3]
> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> > [geert: Update RZ/G2M and RZ/G2E]
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> During my review I saw that R-Car E3 (r8a77990) is already using

D3 (r8a77995)?

> the correct parent clock. And with this change all R-Car Gen3 and RZ/G2
> SoCs do so.
>
> Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>

Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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