On Wed, Mar 27, 2019 at 06:03:18PM +0900, Nguyen An Hoan wrote: > From: Hoan Nguyen An <na-hoan@xxxxxxxxxxx> > > Fix setting value for IRQCTL register. We are setting the last 6 bits > of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according > to Hardware manual values 1 are "setting prohibited" for Gen3. > > Signed-off-by: Hoan Nguyen An <na-hoan@xxxxxxxxxxx> Yes, this is what we discussed for "[v2 PATCH] thermal: rcar_gen3_thermal: Fix init value of IRQCTL register" Acked-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
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