Hi Sergei,
Thanks for your patch!
On Thu, Mar 7, 2019 at 8:53 PM Sergei Shtylyov
<sergei.shtylyov@xxxxxxxxxxxxxxxxxx> wrote:
> Testing has shown that the RPC-IF module clock's parent is the RPCD2 clock,
> not the RPC one -- the RPC-IF register reads stall otherwise...
Perhaps... Or something else is wrong with how the RPC driver uses the
clock hierarchy.
According to the docs, RPC clocks RPC-PHY, and RPCD2 clocks RPC-LINK.
Currently nothing references RPCD2, so it is disabled automatically.
If you make RPC -> RPCD2 -> RPC-IF, enabling RPC-IF indeed enables
both RPC and RPCD2.
Perhaps the RPC device node does need a reference to RPCD2?
Is this also the case on R-Car V3M, where RPCD2 is not controlled by the
CPG, but by the DIVREG register in the RPC-IF module itself?
See also section 62.4.7 (Frequency change), which does not have a
subsection for V3H, but it may be impacted (changing RPCD2 causes
an additional read of RPCCKR, satisfying the read-after-write requirement
documented there).
> Fixes: 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks")
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
> --- renesas-drivers.orig/drivers/clk/renesas/r8a77980-cpg-mssr.c
> +++ renesas-drivers/drivers/clk/renesas/r8a77980-cpg-mssr.c
> @@ -171,7 +171,7 @@ static const struct mssr_mod_clk r8a7798
> DEF_MOD("gpio1", 911, R8A77980_CLK_CP),
> DEF_MOD("gpio0", 912, R8A77980_CLK_CP),
> DEF_MOD("can-fd", 914, R8A77980_CLK_S3D2),
> - DEF_MOD("rpc-if", 917, R8A77980_CLK_RPC),
> + DEF_MOD("rpc-if", 917, R8A77980_CLK_RPCD2),
> DEF_MOD("i2c4", 927, R8A77980_CLK_S0D6),
> DEF_MOD("i2c3", 928, R8A77980_CLK_S0D6),
> DEF_MOD("i2c2", 929, R8A77980_CLK_S3D2),
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
