Adds support for R-Car RZ/G2E (r8a774c0) ZG clock.
Signed-off-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>
Tested-by: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>
---
Compile tested only
---
drivers/clk/renesas/r8a774c0-cpg-mssr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
index d9130723d6c8..2c12bfddca95 100644
--- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
@@ -81,6 +81,8 @@ static const struct cpg_core_clk r8a774c0_core_clks[] __initconst = {
DEF_FIXED("za8", R8A774C0_CLK_ZA8, CLK_PLL0D8, 1, 1),
DEF_GEN3_Z("z2", R8A774C0_CLK_Z2, CLK_TYPE_GEN3_Z,
CLK_PLL0, 4, CPG_FRQCRC, 8),
+ DEF_GEN3_Z("zg", R8A774C0_CLK_ZG, CLK_TYPE_GEN3_Z,
+ CLK_PLL0, 8, CPG_FRQCRB, 24),
DEF_FIXED("ztr", R8A774C0_CLK_ZTR, CLK_PLL1, 6, 1),
DEF_FIXED("zt", R8A774C0_CLK_ZT, CLK_PLL1, 4, 1),
DEF_FIXED("zx", R8A774C0_CLK_ZX, CLK_PLL1, 3, 1),
--
2.11.0
