Hello Geert,
Thank you for your patch!
> From: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> Sent: 21 February 2019 13:00
> Subject: [PATCH] arm64: dts: renesas: r8a77990: Fix SCIF5 DMA channels
>
> From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
>
> According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of Feb
> 12, 2019, the DMA channels for SCIF5 are corrected from 16..47 to 0..15
> on R-Car E3.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> Fixes: a5ebe5e49a862e21 ("arm64: dts: renesas: r8a77990: Add SCIF-{0,1,3,4,5} device nodes")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Reviewed-by: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>
> ---
> Verified on Ebisu-4D using an oscilloscope probing the right pad for
> unpopulated R631 (I couldn't find CP45).
> ---
> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> index f8f48a262200aba1..a16ffeecad30b653 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
> @@ -2,7 +2,7 @@
> /*
> * Device Tree Source for the R-Car E3 (R8A77990) SoC
> *
> - * Copyright (C) 2018 Renesas Electronics Corp.
> + * Copyright (C) 2018-2019 Renesas Electronics Corp.
> */
>
> #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
> @@ -1067,9 +1067,8 @@
> <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
> <&scif_clk>;
> clock-names = "fck", "brg_int", "scif_clk";
> - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
> - <&dmac2 0x5b>, <&dmac2 0x5a>;
> - dma-names = "tx", "rx", "tx", "rx";
> + dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
> + dma-names = "tx", "rx";
This should be the same for the r8a774c0 as well, but unfortunately we can't test it.
Do you want to send the patch for the r8a774c0 yourself or do you prefer me to do it?
Thanks,
Fab
> power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
> resets = <&cpg 202>;
> status = "disabled";
> --
> 2.17.1
