The RZ/A1H (R7S721000) SoC manual describes the Ether MAC's RX checksum offload the same way as it's implemented in the EtherAVB MACs... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx> --- drivers/net/ethernet/renesas/sh_eth.c | 1 + 1 file changed, 1 insertion(+) Index: renesas/drivers/net/ethernet/renesas/sh_eth.c =================================================================== --- renesas.orig/drivers/net/ethernet/renesas/sh_eth.c +++ renesas/drivers/net/ethernet/renesas/sh_eth.c @@ -620,6 +620,7 @@ static struct sh_eth_cpu_data r7s72100_d .no_ade = 1, .xdfar_rw = 1, .csmr = 1, + .rx_csum = 1, .tsu = 1, .no_tx_cntrs = 1, };