On Tue, Jan 22, 2019 at 8:59 PM Sergei Shtylyov
<sergei.shtylyov@xxxxxxxxxxxxxxxxxx> wrote:
> The RPCSRC internal clock is controlled by the RPCCKCR.DIV[4:3] on all
> the R-Car gen3 SoCs except V3M (R8A77970) but the encoding of this field
> is different between SoCs; it makes sense to support the most common case
> of this encoding in the R-Car gen3 CPG driver...
>
> After adding the RPCSRC clock, we can add the RPC[D2] clocks derived from
> it and controlled by the RPCCKCR register on all the R-Car gen3 SoCs except
> V3M (R8A77970); the composite clock driver seems handy for this task, using
> the spinlock added in the previous patch...
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
>
> ---
> Changes in version 3:
> - added 'struct rpcd2_clock' embracing both 'struct clk_fixed_factor' and
> 'struct clk_gate' to reduce the # of kzalloc() calls;
> - added a comment about the single notifier to 'struct rpc_clock';
> - refreshed the patch.
Thanks for the update!
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> --- renesas-drivers.orig/drivers/clk/renesas/rcar-gen3-cpg.c
> +++ renesas-drivers/drivers/clk/renesas/rcar-gen3-cpg.c
> +struct rpc2_clock {
rpcd2
> + struct clk_fixed_factor fixed;
> + struct clk_gate gate;
> +};
> +
> +static struct clk * __init cpg_rpcd2_clk_register(const char *name,
> + void __iomem *base,
> + const char *parent_name)
> +{
> + struct rpc2_clock *rpc2;
rpcd2 (twice)
No need to resend, fixing up while applying.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
