Hello Shimoda-san,
On Friday, 14 December 2018 12:41:32 EET Yoshihiro Shimoda wrote:
> From: Laurent Pinchart, Sent: Thursday, December 13, 2018 10:53 PM
> > On Wednesday, 12 December 2018 12:19:35 EET Yoshihiro Shimoda wrote:
> > > From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> > >
> > > MOD_SEL register bit numbering was different from R-Car D3 SoC and
> > > R-Car H3/M3-[WN] SoCs.
> > >
> > > MOD_SEL 1-bit H3/M3-[WN] D3
> > > =============== ========== =====
> > > Set Value = H'0 b'0 b'0
> > > Set Value = H'1 b'1 b'1
> > >
> > > MOD_SEL 2-bits H3/M3-[WN] D3
> > > =============== ========== =====
> > > Set Value = H'0 b'00 b'00
> > > Set Value = H'1 b'01 b'10
> > > Set Value = H'2 b'10 b'01
> > > Set Value = H'3 b'11 b'11
> > >
> > > MOD_SEL 3-bits H3/M3-[WN] D3
> > > =============== ========== =====
> > > Set Value = H'0 b'000 b'000
> > > Set Value = H'1 b'001 b'100
> > > Set Value = H'2 b'010 b'010
> > > Set Value = H'3 b'011 b'110
> > > Set Value = H'4 b'100 b'001
> > > Set Value = H'5 b'101 b'101
> > > Set Value = H'6 b'110 b'011
> > > Set Value = H'7 b'111 b'111
> > >
> > > This patch replaces the #define name and value of MOD_SEL.
> > >
> > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> > > Fixes: 794a67117646 ("pinctrl: sh-pfc: Initial R8A77995 PFC support")
> > > [shimoda: split a patch per SoC and revise the commit log]
> > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> >
> > Per Geert's request I've tested this patch on the Draak board with pwm-
> > backlight, and it doesn't seem to make any difference.
>
> Thank you for testing this patch!
> The result seems strange to me. So, I'll investigate it in next week.
My guess is that MOD_SEL only affects input signals, not output signals.
--
Regards,
Laurent Pinchart
