Hi all,
This patch series fixes several mismatches between the number of pins
and the number of marks in pin groups for Renesas SoCs. All of these
have been detected by the last patch in the series, which adds a
build-time check for this particular case.
I believe none of the affected pins groups are configured by the
DTS files supplied with the kernel.
I intend to queue this up in sh-pfc-for-v4.21, as I will probably have
other fixes to send a PR for anyway.
Thanks for your comments!
Geert Uytterhoeven (6):
pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii
group
pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1
group
pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b
group
pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group
pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group
pinctrl: sh-pfc: Validate pins/marks in pin group at build time
drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 6 +-----
drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 1 +
drivers/pinctrl/sh-pfc/sh_pfc.h | 3 ++-
4 files changed, 6 insertions(+), 7 deletions(-)
--
2.17.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
