> + sdhi3_pins: sd3 {
> + groups = "sdhi3_data8", "sdhi3_ctrl";
> + function = "sdhi3";
> + power-source = <1800>;
> + };
> +
> + sdhi3_pins_uhs: sd3_uhs {
> + groups = "sdhi3_data8", "sdhi3_ctrl";
> + function = "sdhi3";
> + power-source = <1800>;
> + };
Shouldn't we have only one pinctrl config here, like you did recently
for the other Gen3 SoCs?
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