Hi Kaneko-san, On Sat, Oct 20, 2018 at 11:31 PM Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> wrote: > From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx> > > This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to > the R8A77990 SoC. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> Thanks for your patch! > --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c > +static const unsigned int hscif3_data_d_pins[] = { > + /* RX, TX */ > + RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 0), These two pins are exchanged. According to the datasheet, it should be: RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 3), > +}; > + > +static const unsigned int hscif3_data_d_mux[] = { > + HRX3_D_MARK, HTX3_D_MARK, > +}; > @@ -2454,6 +2738,37 @@ enum { > SH_PFC_PIN_GROUP(du_disp_cde), > SH_PFC_PIN_GROUP(du_cde), > SH_PFC_PIN_GROUP(du_disp), > + SH_PFC_PIN_GROUP(hscif0_data_a), > + SH_PFC_PIN_GROUP(hscif0_clk_a), > + SH_PFC_PIN_GROUP(hscif0_ctrl_a), > + SH_PFC_PIN_GROUP(hscif0_data_b), > + SH_PFC_PIN_GROUP(hscif0_clk_b), > + SH_PFC_PIN_GROUP(hscif1_data_a), > + SH_PFC_PIN_GROUP(hscif1_clk_a), > + SH_PFC_PIN_GROUP(hscif1_data_b), > + SH_PFC_PIN_GROUP(hscif1_clk_b), > + SH_PFC_PIN_GROUP(hscif1_ctrl_b), > + SH_PFC_PIN_GROUP(hscif2_data_a), > + SH_PFC_PIN_GROUP(hscif2_clk_a), > + SH_PFC_PIN_GROUP(hscif2_ctrl_a), > + SH_PFC_PIN_GROUP(hscif2_data_b), > + SH_PFC_PIN_GROUP(hscif3_data_a), > + SH_PFC_PIN_GROUP(hscif3_data_b), > + SH_PFC_PIN_GROUP(hscif3_clk_b), > + SH_PFC_PIN_GROUP(hscif3_data_c), > + SH_PFC_PIN_GROUP(hscif3_clk_c), > + SH_PFC_PIN_GROUP(hscif3_ctrl_c), > + SH_PFC_PIN_GROUP(hscif3_data_d), > + SH_PFC_PIN_GROUP(hscif3_data_e), > + SH_PFC_PIN_GROUP(hscif3_ctrl_e), > + SH_PFC_PIN_GROUP(hscif4_data_a), > + SH_PFC_PIN_GROUP(hscif4_clk_a), > + SH_PFC_PIN_GROUP(hscif4_ctrl_a), > + SH_PFC_PIN_GROUP(hscif4_data_b), > + SH_PFC_PIN_GROUP(hscif4_clk_b), > + SH_PFC_PIN_GROUP(hscif4_data_c), > + SH_PFC_PIN_GROUP(hscif4_data_d), > + SH_PFC_PIN_GROUP(hscif4_data_e), > SH_PFC_PIN_GROUP(i2c1_a), > SH_PFC_PIN_GROUP(i2c1_b), > SH_PFC_PIN_GROUP(i2c1_c), The above doesn't compile, as you forgot to update the size of the pinmux_groups.common[] array. > @@ -2781,6 +3142,11 @@ enum { > .common = { > SH_PFC_FUNCTION(avb), > SH_PFC_FUNCTION(du), > + SH_PFC_FUNCTION(hscif0), > + SH_PFC_FUNCTION(hscif1), > + SH_PFC_FUNCTION(hscif2), > + SH_PFC_FUNCTION(hscif3), > + SH_PFC_FUNCTION(hscif4), > SH_PFC_FUNCTION(i2c1), > SH_PFC_FUNCTION(i2c2), > SH_PFC_FUNCTION(i2c4), The above doesn't compile, as you forgot to update the size of the pinmux_functions.common[] array. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds