> Subject: Re: Delay between stop condition and start condition > > > > The passthrough mode is not default, it gets activated by the driver so that > > drm_get_edid can then fetch the EDID. One other nasty thing is that to end the conversation > > with the monitor you are supposed to write 0x00 to register 0x1a of the HDMI transmitter, > > which means the SoC puts address 0x39 on the bus, but the HDMI transmitter lets that > > through, the monitor NACKs the address (because its address is 0x50), and from that > > moment on the control is back with the HDMI transmitter. > > Unfortunately I don't have any other slave on the same bus, but I wonder what happens > > if someone else tries to use the same bus while the pass through mode is operating... > > Wouldn't all this really speak for an i2c gate? Do all enablement stuff > in select(), all disablement stuff in deselect(), and make sure > deselect() is called after every transfer. That would mean the > passthrough is only active when the EDID eeprom is accessed. Would that > work? Given the above, it looks quite sane to do it like that in order > to avoid side-effects of the open passthrough. It sounds like an i2c gate could fit the purpose. I'll give it a shot! Thank you All! Fab Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.