RE: [PATCH 4/5] pinctrl: sh-pfc: r8a77470: Add SDHI2 pin groups

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Hello Wolfram,

Thank you for your feedback!

> -----Original Message-----
> From: Wolfram Sang <wsa@xxxxxxxxxxxxx>
> Sent: 21 September 2018 16:48
> To: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Cc: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>; Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>; Geert Uytterhoeven
> <geert+renesas@xxxxxxxxx>; Linus Walleij <linus.walleij@xxxxxxxxxx>; Linux-Renesas <linux-renesas-soc@xxxxxxxxxxxxxxx>; open
> list:GPIO SUBSYSTEM <linux-gpio@xxxxxxxxxxxxxxx>; Simon Horman <horms@xxxxxxxxxxxx>; Chris Paterson
> <Chris.Paterson2@xxxxxxxxxxx>; Biju Das <biju.das@xxxxxxxxxxxxxx>; Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> Subject: Re: [PATCH 4/5] pinctrl: sh-pfc: r8a77470: Add SDHI2 pin groups
>
>
> > > 2) Specify SH_PFC_PIN_CFG_IO_VOLTAGE for every line that belongs to
> > > the interface, keep the SD card pin groups as specified by this
> > > patch, map all of the pins to the same bit in the POC register (as
> > > per pin_to_pocctrl is concerned), and the board specific device tree
> > > definitions would look like every other RZ/G1 or R-Car Gen2 boards
> > > that support SDR* The only downside would be that the kernel would
> > > read-modify-write the POC Control Register with the same value for
> > > every line in the interface.
>
> I don't think this multiple RMW is a problem.
>
> > This looks the most sensible solution to me: just map in your
> > .pin_to_pocctrl() method all pins of the interface to the single bit.
>
> I didn't fully get if this one bit controls only the CLK wire or all the
> relevant wires? I assume it is the latter one. For that, option 2) is
> totally fine with me.

It is not super clear what the intended behaviour is from the HW User's manual indeed,
but I have tested SDR50 and it seems to be working fine, which would indicate that the
control bit in the POC Control Register is actually controlling all of the lines of the
interface, and not just the CLK pin.

Thanks,
Fab



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