Hi, This series allows the TXA CSI-2 transmitter of the adv748x to function in 1-, 2- and 4- lane mode. Currently the driver fixes the hardware in 4-lane mode. The driver looks at the standard DT property 'data-lanes' to determine which mode it should operate in. Patch 1/3 adds the DT parsing and storing of the number of lanes. Patch 2/3 adds functionality for intercepting and injecting the requested number of lanes when writing the register for NUM_LANES for the TXA register 0x00. Lastly patch 3/3 fixes a type related to lane settings for TXB which is confusing (at lest to me) when reviewing the result of this series. Patch 1/3 and 2/3 could be squashed together but as the method in 2/3 is less then obvious since it intercepts the long tables of register writes I thought splitting them could ease review. The series is based on the latest media-tree master and is tested on Renesas M3-N in 1-, 2- and 4- lane mode. Niklas Söderlund (3): i2c: adv748x: store number of CSI-2 lanes described in device tree i2c: adv748x: configure number of lanes used for TXA CSI-2 transmitter i2c: adv748x: fix typo in comment for TXB CSI-2 transmitter power down drivers/media/i2c/adv748x/adv748x-core.c | 89 +++++++++++++++++++++--- drivers/media/i2c/adv748x/adv748x.h | 1 + 2 files changed, 81 insertions(+), 9 deletions(-) -- 2.18.0
