RE: [PATCH] arm64: dts: renesas: revise properties for usb 2.0

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Hi Geert-san,

> From: Geert Uytterhoeven, Sent: Wednesday, September 5, 2018 9:59 PM
> 
> Hi Shimoda-san,
> 
> On Fri, Aug 31, 2018 at 10:22 AM Yoshihiro Shimoda
> <yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> > R-Car Gen3 needs to enable/deassert clocks/resets of both usb 2.0
> > host (included phy) and peripheral. Otherwise, other side device
> > cannot work correctly. So, this patch revises properties of clocks
> > and resets. After that, each device driver can enable/deassert
> > clocks/resets by its self.
> >
> > Notes:
> >  - To work the renesas_usbhs driver correctly when host side drivers
> >    are disabled and the renesas_usbhs driver doesn't have multiple
> >    clock management, this patch doesn't change the order of the clocks
> >    property in each hsusb node.
> >  - This patch doesn't have any side-effects even if the renesas_usbhs
> >    driver doesn't have reset_control and multiple clock management.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> 
> Thanks for your patch!
> 
> I'm a bit confused about the HS-USB <-> EHCI/OHCI topology.
> Can you please explain?
> 
> Thanks!

HS-USB <-> EHCI/OHCI topology on R-Car H3 is:

 EHCI/OHCI ch0/3 ---+--- PHY (is included on the EHCI/OHCI) --- External pins
 HS-USB ch0/3    ---+

 EHCI ch1/2      ------- PHY (is included on the EHCI/OHCI) --- External pins
 # These channels don't have HS-USB.

And module stops and resets of HS-USB and EHCI/OHCI topology on R-Car H3 is:

 MSTP/RST703 ---+(OR)---+--- EHCI/OHCI ch0
 MSTP/RST704 ---+       +--- HS-USB ch0

 MSTP/RST702 --------------- EHCI/OHCI ch1
 MSTP/RST701 --------------- EHCI/OHCI ch2

 MSTP/RST700 ---+(OR)---+--- EHCI/OHCI ch3
 MSTP/RST705 ---+       +--- HS-USB ch3

Should I describe these topology on the commit log or somewhere?

> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -707,7 +707,8 @@
> >                                      "renesas,rcar-gen3-usbhs";
> >                         reg = <0 0xe6590000 0 0x100>;
> >                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> > -                       clocks = <&cpg CPG_MOD 704>;
> > +                       clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
> > +                       clock-names = "hsusb", "ehci/ohci";
> 
> 703 is EHCI/OHCI0. What about EHCI/OHCI1 and EHCI/OHCI2?

EHCI/OHCI1 and EHCI/OHCI2 don't need because they are not related to the HS-USB0.

> >                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
> >                                <&usb_dmac1 0>, <&usb_dmac1 1>;
> >                         dma-names = "ch0", "ch1", "ch2", "ch3";
> > @@ -715,7 +716,7 @@
> >                         phys = <&usb2_phy0>;
> >                         phy-names = "usb";
> >                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> > -                       resets = <&cpg 704>;
> > +                       resets = <&cpg 704>, <&cpg 703>;
> >                         status = "disabled";
> >                 };
> >
> > @@ -724,7 +725,8 @@
> >                                      "renesas,rcar-gen3-usbhs";
> >                         reg = <0 0xe659c000 0 0x100>;
> >                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> > -                       clocks = <&cpg CPG_MOD 705>;
> > +                       clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
> > +                       clock-names = "hsusb", "ehci/ohci";
> 
> So this one is linked to EHCI/OHCI3?

Yes.

> >                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
> >                                <&usb_dmac3 0>, <&usb_dmac3 1>;
> >                         dma-names = "ch0", "ch1", "ch2", "ch3";
> > @@ -732,7 +734,7 @@
> >                         phys = <&usb2_phy3>;
> >                         phy-names = "usb";
> >                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> > -                       resets = <&cpg 705>;
> > +                       resets = <&cpg 705>, <&cpg 700>;
> >                         status = "disabled";
> >                 };
> >
> > @@ -2098,11 +2100,11 @@
> >                         compatible = "generic-ohci";
> >                         reg = <0 0xee080000 0 0x100>;
> >                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> > -                       clocks = <&cpg CPG_MOD 703>;
> > +                       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
> >                         phys = <&usb2_phy0>;
> >                         phy-names = "usb";
> >                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> > -                       resets = <&cpg 703>;
> > +                       resets = <&cpg 703>, <&cpg 704>;
> >                         status = "disabled";
> >                 };
> 
> The above is for the ohci0 node.
> What about ohci1 and ohci2?
> 
> Same for ehci below.

[oe]hci[12] don't have HS-USB. So, we don't need to revise them.

Best regards,
Yoshihiro Shimoda

> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds




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