On Tue, Aug 7, 2018 at 10:03 AM Biju Das <biju.das@xxxxxxxxxxxxxx> wrote: > GPIO hole is present in RZ/G1C SoC. Valid GPIO pins on bank3 are in the > range GP3_0 to GP3_16 and GP3_27 to GP3_29. The GPIO pins between GP3_17 > to GP3_26 are unused. Add support for handling unused GPIO's. > > Signed-off-by: Biju Das <biju.das@xxxxxxxxxxxxxx> Patch applied with Geert's review tag. Yours, Linus Walleij
