Re: [PATCH v2 3/7] pinctrl: sh-pfc: r8a77965: Add HSCIF0 pins, groups, and functions

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On Sun, Aug 12, 2018 at 03:31:45PM +0200, Eugeniu Rosca wrote:
> According to R-Car Gen3 HW manual Rev.1.00 Apr 2018, M3-N SoC implements
> five (0..4) HSCIF channels, similar to H3, M3-W and E3.
> 
> The story behind this patch is tackling below dmesg warnings, which pop
> up when booting M3NULCB Kingfisher board:
> 
> $ dmesg | grep sh-pfc
> sh-pfc e6060000.pin-controller: r8a77965_pfc support registered
> sh-pfc e6060000.pin-controller: function 'hscif0' not supported
> sh-pfc e6060000.pin-controller: invalid function hscif0 in map table
> sh-pfc e6060000.pin-controller: function 'hscif0' not supported
> sh-pfc e6060000.pin-controller: invalid function hscif0 in map table
> 
> To fix them, extract the HSCIF0 part from below v4.15-rc1 commits:
>  - commit 7a362e3488cb ("pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and functions")
>  - commit 0e4e4999aac1 ("pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions")
> 
> Note that `checkpatch --strict` throws several "CHECK: Please use a
> blank line after function/struct/union/enum declarations", which are
> ignored for the sake of staying in sync with the aforementioned commits.
> 
> Signed-off-by: Eugeniu Rosca <erosca@xxxxxxxxxxxxxx>

Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>




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