RE: [PATCH v2 4/5] clk: renesas: Add r8a774a1 CPG Core Clock Definitions

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Hi Rob,


> Subject: Re: [PATCH v2 4/5] clk: renesas: Add r8a774a1 CPG Core Clock
> Definitions
>
> Hi, this is an automated email from Rob's (experimental) review bot. I found
> a couple of common problems with your patch. Please see below.

Do I need to send another patch? The mail says " Rob's (experimental) review bot".
Previously for RZ/G1C upstreaming I have submitted the patches in similar fashion.
Is anything changed?

> On Thu,  2 Aug 2018 15:56:34 +0100, Biju Das wrote:
> > Add all RZ/G2M Clock Pulse Generator Core Clock Outputs, as listed in
> > Table 8.2b ("List of Clocks [RZ/G2M]") of the RZ/G2M Hardware User's
> > Manual.
> >
> > Signed-off-by: Biju Das <biju.das@xxxxxxxxxxxxxx>
> > Reviewed-by: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> The preferred subject prefix is "dt-bindings: <binding dir>: ...".

Regards,
Biju



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.




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