On Sun, Jun 10, 2018 at 09:22:46PM +0300, Sergei Shtylyov wrote:
> This PHY is still mostly undocumented -- the only documented registers
> exist on R-Car V3H (R8A77980) SoC. Add the corresponding device tree
> bindings.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
>
> ---
> Changes in version 2:
> - split from the big driver/bindings patch;
> - got rid of the generic R-Car gen3 "compatible" prop value.
>
> Documentation/devicetree/bindings/phy/rcar-gen3-phy-pcie.txt | 24 +++++++++++
> 1 file changed, 24 insertions(+)
Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>
>
> Index: linux-phy/Documentation/devicetree/bindings/phy/rcar-gen3-phy-pcie.txt
> ===================================================================
> --- /dev/null
> +++ linux-phy/Documentation/devicetree/bindings/phy/rcar-gen3-phy-pcie.txt
> @@ -0,0 +1,24 @@
> +* Renesas R-Car generation 3 PCIe PHY
> +
> +This file provides information on what the device node for the R-Car
> +generation 3 PCIe PHY contains.
> +
> +Required properties:
> +- compatible: "renesas,r8a77980-pcie-phy" if the device is a part of the
> + R8A77980 SoC.
> +- reg: offset and length of the register block.
> +- clocks: clock phandle and specifier pair.
> +- power-domains: power domain phandle and specifier pair.
> +- resets: reset phandle and specifier pair.
> +- #phy-cells: see phy-bindings.txt in the same directory, must be <0>.
> +
> +Example (R-Car V3H):
> +
> + pcie-phy@e65d0000 {
> + compatible = "renesas,r8a77980-pcie-phy";
> + reg = <0 0xe65d0000 0 0x8000>;
> + #phy-cells = <0>;
> + clocks = <&cpg CPG_MOD 319>;
> + power-domains = <&sysc 32>;
> + resets = <&cpg 319>;
> + };
>
