The internal LVDS encoder now has DT bindings separate from the DU. Port
the r8a7795 and r8a7796 device trees over to the new model.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
---
Changes since v4:
- Squashed the r8a7795 and r8a7796 changes together
Changes since v3:
- Added power-domains and resets properties to LVDS nodes
- Dropped bogus changes from the rcar-du driver
Changes since v2:
- Fixed LVDS compatible string
Changes since v1:
- Remove the DU reg-names property
---
.../boot/dts/renesas/r8a7795-es1-salvator-x.dts | 3 +-
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 3 +-
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 3 +-
.../arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 3 +-
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 36 ++++++++++++++++++----
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 3 +-
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 3 +-
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 36 ++++++++++++++++++----
8 files changed, 66 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
index 3f46345a4644..afcf7cc61640 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
@@ -43,12 +43,11 @@
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>,
- <&cpg CPG_MOD 727>,
<&versaclock5 1>,
<&x21_clk>,
<&x22_clk>,
<&versaclock5 2>;
- clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
+ clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index 0afe777973de..f0d6528c05eb 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -44,11 +44,10 @@
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>,
- <&cpg CPG_MOD 727>,
<&versaclock5 1>,
<&versaclock5 3>,
<&versaclock5 4>,
<&versaclock5 2>;
- clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
+ clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 0efbef5ea9b7..cd3ebb514538 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -43,12 +43,11 @@
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>,
- <&cpg CPG_MOD 727>,
<&versaclock5 1>,
<&x21_clk>,
<&x22_clk>,
<&versaclock5 2>;
- clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
+ clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
index e231b5a7cbab..1e5cba43911c 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
@@ -43,12 +43,11 @@
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>,
- <&cpg CPG_MOD 727>,
<&versaclock6 1>,
<&x21_clk>,
<&x22_clk>,
<&versaclock6 2>;
- clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
+ clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 3ac75dbf2d93..9b154ff33e67 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -2785,9 +2785,7 @@
du: display@feb00000 {
compatible = "renesas,du-r8a7795";
- reg = <0 0xfeb00000 0 0x80000>,
- <0 0xfeb90000 0 0x14>;
- reg-names = "du", "lvds.0";
+ reg = <0 0xfeb00000 0 0x80000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
@@ -2795,9 +2793,8 @@
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
- <&cpg CPG_MOD 721>,
- <&cpg CPG_MOD 727>;
- clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
+ <&cpg CPG_MOD 721>;
+ clock-names = "du.0", "du.1", "du.2", "du.3";
vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
status = "disabled";
@@ -2825,6 +2822,33 @@
port@3 {
reg = <3>;
du_out_lvds0: endpoint {
+ remote-endpoint = <&lvds0_in>;
+ };
+ };
+ };
+ };
+
+ lvds0: lvds@feb90000 {
+ compatible = "renesas,r8a7795-lvds";
+ reg = <0 0xfeb90000 0 0x14>;
+ clocks = <&cpg CPG_MOD 727>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 727>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ lvds0_in: endpoint {
+ remote-endpoint = <&du_out_lvds0>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ lvds0_out: endpoint {
};
};
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index daee1f1a3f68..21bd679062f3 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
@@ -33,10 +33,9 @@
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
- <&cpg CPG_MOD 727>,
<&versaclock5 1>,
<&versaclock5 3>,
<&versaclock5 2>;
- clock-names = "du.0", "du.1", "du.2", "lvds.0",
+ clock-names = "du.0", "du.1", "du.2",
"dclkin.0", "dclkin.1", "dclkin.2";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index 90cca09b9a5e..11d213ffd9de 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -32,11 +32,10 @@
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
- <&cpg CPG_MOD 727>,
<&versaclock5 1>,
<&x21_clk>,
<&versaclock5 2>;
- clock-names = "du.0", "du.1", "du.2", "lvds.0",
+ clock-names = "du.0", "du.1", "du.2",
"dclkin.0", "dclkin.1", "dclkin.2";
};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 7c25be6b5af3..f24abf441f3f 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -2396,17 +2396,14 @@
du: display@feb00000 {
compatible = "renesas,du-r8a7796";
- reg = <0 0xfeb00000 0 0x70000>,
- <0 0xfeb90000 0 0x14>;
- reg-names = "du", "lvds.0";
+ reg = <0 0xfeb00000 0 0x70000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
- <&cpg CPG_MOD 722>,
- <&cpg CPG_MOD 727>;
- clock-names = "du.0", "du.1", "du.2", "lvds.0";
+ <&cpg CPG_MOD 722>;
+ clock-names = "du.0", "du.1", "du.2";
status = "disabled";
vsps = <&vspd0 &vspd1 &vspd2>;
@@ -2429,6 +2426,33 @@
port@2 {
reg = <2>;
du_out_lvds0: endpoint {
+ remote-endpoint = <&lvds0_in>;
+ };
+ };
+ };
+ };
+
+ lvds0: lvds@feb90000 {
+ compatible = "renesas,r8a7796-lvds";
+ reg = <0 0xfeb90000 0 0x14>;
+ clocks = <&cpg CPG_MOD 727>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 727>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ lvds0_in: endpoint {
+ remote-endpoint = <&du_out_lvds0>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ lvds0_out: endpoint {
};
};
};
--
Regards,
Laurent Pinchart
