RFC: RZ/N1 clock architecture...

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Hi guys,

In the current SDK for the RZ/N1, we made a clock architecture that is entirely device-tree based.
The clock hierarchy is quite complex and was machine generated from design documents, and
some exceptions and grouping were added to the 'main' family rzn1.dtsi...

Apart from a few fixed-clock nodes, all of the other nodes are 'special' and require a driver. All
of these drivers are sub-drivers to a 'main' clock driver. That has been working for 2 years already.

One extra note: we don't 'own' all of these clocks, part of the clocks/dividers can be
enable/disabled by the CM3 core.

Now, For upstreaming, I'm going to have to change that, since already the 'clock' bits are going
to go under the MFD sysctrl node. However I'm trying to figure out if we can still use our
rzn1-clocks.dtsi in some form, as well as my drivers, or so I have to convert it to a C table in
some way.

Also note that all the clock refer to SYSCTRL registers/bits using constant names from a header
file, not hex constants etc.

I would appreciate any ideas/suggestions before I commit blindly to a path...

Here is the main autogenerated clock file:
https://github.com/renesas-rz/rzn1_linux/blob/rzn1-stable/arch/arm/boot/dts/rzn1-clocks.dtsi
Here's the extra clock{} node in the main rzn1.dtsi
https://github.com/renesas-rz/rzn1_linux/blob/89d6c9be056a462b95d5217221d70d6e5c25dfc2/arch/arm/boot/dts/rzn1.dtsi#L70





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