On Mon, Apr 09, 2018 at 02:29:22PM +0200, Geert Uytterhoeven wrote:
> According to the R-Car Gen3 Hardware Manual Errata for Rev 0.80 of
> December 22, 2017, the parent clock of the PCIe module clock on R-Car
> V3H is S2D2.
>
> Fixes: ce15783c510a9905 ("clk: renesas: cpg-mssr: add R8A77980 support")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Reviewed-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>
