Hi Kieran,
Thank you for the patch.
On Wednesday, 14 February 2018 11:55:06 EET Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
>
> The VSPD includes a CLUT on RPF2. Ensure that the register space is
> mapped correctly to support this.
>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
> b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index
> ed553338b4d4..1adfe6cad268 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
> @@ -80,7 +80,7 @@
>
> vspd3: vsp@fea38000 {
> compatible = "renesas,vsp2";
> - reg = <0 0xfea38000 0 0x4000>;
> + reg = <0 0xfea38000 0 0x8000>;
> interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 620>;
> power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
--
Regards,
Laurent Pinchart
