Hi Ulrich, Wolfram,
Is there any update to this patch series?
This seems to be the latest I could find for D3.
I need I2C on D3 for my current additional task, so I'll try to use these
patches as the base for now.
(Patch 3, 4, 5 apply on top of renesas-drivers-2018-01-09-v4.15-rc7, so if it
works - that's enough for me for the moment)
Please let me know if there is a newer series or branch that I should be
considering as a base.
--
Kieran
On 15/11/17 15:25, Ulrich Hecht wrote:
> Defines R-Car D3 I2C controllers 0-3.
>
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@xxxxxxxxx>
> ---
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 64 +++++++++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index 5fa7572..b3113003 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -400,6 +400,70 @@
> status = "disabled";
> };
>
> + i2c0: i2c@e6500000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a77995",
> + "renesas,rcar-gen3-i2c";
> + reg = <0 0xe6500000 0 0x40>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 931>;
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 931>;
> + dmas = <&dmac1 0x91>, <&dmac1 0x90>;
> + dma-names = "tx", "rx";
> + i2c-scl-internal-delay-ns = <110>;
> + status = "disabled";
> + };
> +
> + i2c1: i2c@e6508000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a77995",
> + "renesas,rcar-gen3-i2c";
> + reg = <0 0xe6508000 0 0x40>;
> + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 930>;
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 930>;
> + dmas = <&dmac1 0x93>, <&dmac1 0x92>;
> + dma-names = "tx", "rx";
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
> +
> + i2c2: i2c@e6510000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a77995",
> + "renesas,rcar-gen3-i2c";
> + reg = <0 0xe6510000 0 0x40>;
> + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 929>;
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 929>;
> + dmas = <&dmac1 0x95>, <&dmac1 0x94>;
> + dma-names = "tx", "rx";
> + i2c-scl-internal-delay-ns = <6>;
> + status = "disabled";
> + };
> +
> + i2c3: i2c@e66d0000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "renesas,i2c-r8a77995",
> + "renesas,rcar-gen3-i2c";
> + reg = <0 0xe66d0000 0 0x40>;
> + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 928>;
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 928>;
> + dmas = <&dmac0 0x97>, <&dmac0 0x96>;
> + dma-names = "tx", "rx";
> + i2c-scl-internal-delay-ns = <110>;
> + status = "disabled";
> + };
> +
> pwm0: pwm@e6e30000 {
> compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
> reg = <0 0xe6e30000 0 0x8>;
>
