Hello!
On 12/08/2017 06:40 PM, Thomas Petazzoni wrote:
This commit adds the sh_eth_cpu_data structure that describes the
SH7786 variant of the IP.
The manual seems to be unavailable, so I have to trust you. :-)
Yes, sadly. However, if you tell me what to double check, I'd be happy
to do so.
I have the manual now, will check against it...
DaveM, I'm retracting my ACK for the time being.
Starting to look into the manual, the current patch is wrong. SH7786 SoC
was probably the 1st one to use what we thought was R-Car specific register
layout. Definite NAK on this version.
Thanks for the feedback. How do we proceed from there ? I don't have
Please use SH_ETH_REG_FAST_RCAR for the register layout.
access to a lot of datasheets of the different Renesas SoCs, so it's
not easy to figure out which IP variant the SH7786 is using compared to
other Renesas SoCs.
I've already done that for you. :-)
Just out of curiosity, which specific aspect makes you think the
proposed patch is wrong ?
Total Ether register/bit documentation rehaul done for SH7786/R-Car --
including the register (and bit) rename and moving the registers to different
offsets...
Have you noticed a specific register or field
that isn't compatible with SH_ETH_REG_FAST_SH4 layout ?
There are surely SH4 registers that don't exist on SH7786 -- like BCFRR,
RTRATE, RPADIR, RBWAR, RDFAR, TBRAR, TDFAR...
Note that my patch makes Ethernet work in practice on SH7784, I have
root over NFS working as we speak.
I don't doubt it...
This certainly doesn't mean that the
patch is entirely correct, but it definitely means that the
SH_ETH_REG_FAST_SH4 is close enough to what the SH7786 is using :-)
SH_ETH_REG_FAST_RCAR is definitely closer. :-)
Thanks!
Thomas
MBR, Sergei