Hello, > From: Biju Das > Sent: 31 August 2017 10:24 > > > From: Simon Horman [mailto:horms@xxxxxxxxxxxx] > > Sent: 31 August 2017 09:46 <snip> > > > + phy3: ethernet-phy@3 { > > > + /* > > > + * On some older versions of the platform (before R4.0) the phy > > address > > > + * may be 1 or 3. The address is fixed to 3 for R4.0 onwards. > > > + */ > > > + reg = <3>; > > > + micrel,led-mode = <1>; > > > > Does the phy have an interrupt? > > The current board doesn't support interrupt . But there is a plan to support this > in future board variants through (GPIO3_28). Actually, the plan has recently changed and at the moment interrupt support will not be added in the production version of the board. If in the end the plan changes again and the actual hardware does add interrupt support we'll submit a new patch accordingly. Kind regards, Chris
