On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> wrote: > From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx> > > This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24] > value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24]. > > This is a correction to the incorrect implementation of MOD_SEL register > pin assignment for R8A7795 SoC specification of R-Car Gen3 Hardware > User's Manual Rev.0.51E or later. > > Fixes: 0b0ffc96dbe3 ("pinctrl: sh-pfc: Initial R8A7795 PFC support) > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> i.e. will queue in sh-pfc-for-v4.14. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds