Tested this patch on iWave RZ/G1M platform. Tested-by: Biju Das <biju.das@xxxxxxxxxxxxxx> Regards, Biju > -----Original Message----- > From: Wolfram Sang [mailto:wsa+renesas@xxxxxxxxxxxxxxxxxxxx] > Sent: 03 August 2017 10:50 > To: linux-mmc@xxxxxxxxxxxxxxx > Cc: linux-renesas-soc@xxxxxxxxxxxxxxx; Simon Horman <horms@xxxxxxxxxxxx>; > Biju Das <biju.das@xxxxxxxxxxxxxx>; Ulf Hansson <ulf.hansson@xxxxxxxxxx>; > Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> > Subject: [PATCH] Revert "mmc: sdhi: use maximum width for the sdbuf > register" > > This reverts commit 785b215250310c690142abb1bdbb0767b8487c49. There is > a secondary SDHI instance on Gen2 with has a 32-bit wide SDBUF register while > all other registers are 16 bit apart. So, the logic used here does not apply and > we need to rethink this and start cleanly from scratch. > > Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> > --- > drivers/mmc/host/renesas_sdhi_core.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/renesas_sdhi_core.c > b/drivers/mmc/host/renesas_sdhi_core.c > index 48da28dfef6465..dd215723fa4312 100644 > --- a/drivers/mmc/host/renesas_sdhi_core.c > +++ b/drivers/mmc/host/renesas_sdhi_core.c > @@ -461,7 +461,8 @@ static void renesas_sdhi_enable_dma(struct > tmio_mmc_host *host, bool enable) { > sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? > DMA_ENABLE_DMASDRW : 0); > > -renesas_sdhi_sdbuf_width(host, enable ? (16 << host->bus_shift) : 16); > +/* enable 32bit access if DMA mode if possibile */ > +renesas_sdhi_sdbuf_width(host, enable ? 32 : 16); > } > > int renesas_sdhi_probe(struct platform_device *pdev, > -- > 2.11.0 Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
