Re: [PATCH 0/3] clk: renesas: rcar-gen3-cpg: updates to SD divider table

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To: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Subject: Re: [PATCH 0/3] clk: renesas: rcar-gen3-cpg: updates to SD divider table
From: Wolfram Sang <wsa@xxxxxxxxxxxxx>
Date: Tue, 1 Aug 2017 18:29:36 +0200
Cc: linux-clk@xxxxxxxxxxxxxxx, linux-renesas-soc@xxxxxxxxxxxxxxx, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>, Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxx>
In-reply-to: <20170801104603.10459-1-wsa+renesas@sang-engineering.com>
User-agent: NeoMutt/20170113 (1.7.2)

> Tested on a M3-W Salvator-X (r8a7796) with HS and SDR50/104 cards. clk_summary
> shows the same frequency selections as before.

Darn, not tested on H3 ES1.0 where it fails because everything is half
speed there :( Need to rethink this.

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