From: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
The DU dot clocks 0 and 3 are provided by the programmable VC6 clock
generator. Connect them to the clock source node.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Signed-off-by: Simon Horman <horms+renesas@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
index 6a7d1b22d0fe..7675de5d4f2c 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
@@ -44,10 +44,12 @@
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>,
<&cpg CPG_MOD 727>,
+ <&versaclock6 1>,
<&x21_clk>,
- <&x22_clk>;
+ <&x22_clk>,
+ <&versaclock6 2>;
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
- "dclkin.1", "dclkin.2";
+ "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};
&ehci2 {
--
2.1.4
