Re: [PATCH 2/4] clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3

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On 07/20, Geert Uytterhoeven wrote:
> On some R-Car Gen3 SoCs (e.g. R-Car D3), PLL1 and PLL3 use a divider
> value different from one.  Extend struct rcar_gen3_cpg_pll_config to handle
> this.  As all multipliers and dividers are small, table size increase
> can be kept limited by storing them in u8s instead of unsigned ints,
> which saves ca. 0.5 KiB for a generic kernel.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> ---

Acked-by: Stephen Boyd <sboyd@xxxxxxxxxxxxxx>

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