[PATCH 7/8] clk: vc5: Add bindings for IDT VersaClock 5P49V6901

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From: Marek Vasut <marek.vasut+renesas@xxxxxxxxx>

IDT VersaClock 6 5P49V6901 has 4 clock outputs, 4 fractional dividers.
Input clock source can be taken from either external crystal or from
external reference clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@xxxxxxxxx>
Cc: Alexey Firago <alexey_firago@xxxxxxxxxx>
Cc: Rob Herring <robh@xxxxxxxxxx>
Cc: Stephen Boyd <sboyd@xxxxxxxxxxxxxx>
Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
Cc: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
Cc: linux-renesas-soc@xxxxxxxxxxxxxxx
Cc: devicetree@xxxxxxxxxxxxxxx
---
 .../devicetree/bindings/clock/idt,versaclock5.txt         | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
index 53d7e50ed875..a3d4260039a8 100644
--- a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
+++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
@@ -7,18 +7,20 @@ from 3 to 12 output clocks.
 
 Required properties:
 - compatible:	shall be one of "idt,5p49v5923" , "idt,5p49v5933" ,
-		"idt,5p49v5935".
+		"idt,5p49v5935" , "idt,5p49v6901".
 - reg:		i2c device address, shall be 0x68 or 0x6a.
 - #clock-cells:	from common clock binding; shall be set to 1.
 - clocks:	from common clock binding; list of parent clock handles,
-		- 5p49v5923: (required) either or both of XTAL or CLKIN
+		- 5p49v5923 and
+		  5p49v6901: (required) either or both of XTAL or CLKIN
 					reference clock.
 		- 5p49v5933 and
 		- 5p49v5935: (optional) property not present (internal
 					Xtal used) or CLKIN reference
 					clock.
 - clock-names:	from common clock binding; clock input names, can be
-		- 5p49v5923: (required) either or both of "xin", "clkin".
+		- 5p49v5923 and
+		  5p49v6901: (required) either or both of "xin", "clkin".
 		- 5p49v5933 and
 		- 5p49v5935: (optional) property not present or "clkin".
 
@@ -44,6 +46,13 @@ clock specifier, the following mapping applies:
 	3 -- OUT3
 	4 -- OUT4
 
+5P49V6901:
+	0 -- OUT0_SEL_I2CB
+	1 -- OUT1
+	2 -- OUT2
+	3 -- OUT3
+	4 -- OUT4
+
 ==Example==
 
 /* 25MHz reference crystal */
-- 
2.11.0




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