Re: [PATCH] ARM: dts: blanche: Add support for HSCIF0 on CN5

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, Apr 20, 2017 at 11:46:57PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@xxxxxxxxxxxxx>
> 
> r8a7792 Blanche has depending on dip switch and jumper settings
> either HSCIF0 or CAN0 exposed on the on-board CN5 connector.
> 
> This patch adds HSCIF0 to the Blanche dts as serial2.
> 
> Signed-off-by: Magnus Damm <damm+renesas@xxxxxxxxxxxxx>
> ---
> 
>  Currently the r8a7792 PFC is lacking support for HSCIF devices
>  so the PFC driver needs to be updated to avoid error messages
>  on the boot console.

I would rather hold off on applying this patch until the PFC driver
has been enhanced. Does that sound reasonable?

>  arch/arm/boot/dts/r8a7792-blanche.dts |   14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> --- 0001/arch/arm/boot/dts/r8a7792-blanche.dts
> +++ work/arch/arm/boot/dts/r8a7792-blanche.dts	2017-04-20 23:35:50.440607110 +0900
> @@ -21,6 +21,7 @@
>  	aliases {
>  		serial0 = &scif0;
>  		serial1 = &scif3;
> +		serial2 = &hscif0;
>  	};
>  
>  	chosen {
> @@ -207,6 +208,11 @@
>  		function = "scif3";
>  	};
>  
> +	hscif0_pins: hscif0 {
> +		groups = "hscif0_data", "hscif0_ctrl";
> +		function = "hscif0";
> +	};
> +
>  	lan89218_pins: lan89218 {
>  		intc {
>  			groups = "intc_irq0";
> @@ -253,6 +259,14 @@
>  	status = "okay";
>  };
>  
> +&hscif0 {
> +	pinctrl-0 = <&hscif0_pins>;
> +	pinctrl-names = "default";
> +
> +	uart-has-rtscts;
> +	status = "okay";
> +};
> +
>  &can0 {
>  	pinctrl-0 = <&can0_pins>;
>  	pinctrl-names = "default";
> 



[Index of Archives]     [Linux Samsung SOC]     [Linux Wireless]     [Linux Kernel]     [ATH6KL]     [Linux Bluetooth]     [Linux Netdev]     [Kernel Newbies]     [IDE]     [Security]     [Git]     [Netfilter]     [Bugtraq]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Linux ATA RAID]     [Samba]     [Device Mapper]

  Powered by Linux