Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
>
> This patch adds valid HS-USB ch3 clock from R8A7795 ES2.0 SoC.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
I.e. will queue in clk-renesas-for-v4.13.
> --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
> @@ -197,6 +197,7 @@ enum clk_ids {
> DEF_MOD("ehci1", 702, R8A7795_CLK_S3D4),
> DEF_MOD("ehci0", 703, R8A7795_CLK_S3D4),
> DEF_MOD("hsusb", 704, R8A7795_CLK_S3D4),
> + DEF_MOD("hsusb3", 705, R8A7795_CLK_S3D4),
I cannot verify the parent clock, though.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
