Hi Kaneko-san,
On Wed, Apr 19, 2017 at 7:46 PM, Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> wrote:
> From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@xxxxxxxxxxx>
>
> This patch adds SSI(all) and SSI{0,1,2,3,4,5,6,7,8,9} clocks for R8A7796
> SoC.
>
> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@xxxxxxxxxxx>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx>
> ---
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
I.e. will queue in clk-renesas-for-v4.13.
> --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> @@ -208,6 +208,17 @@ enum clk_ids {
> DEF_MOD("i2c2", 929, R8A7796_CLK_S3D2),
> DEF_MOD("i2c1", 930, R8A7796_CLK_S3D2),
> DEF_MOD("i2c0", 931, R8A7796_CLK_S3D2),
> + DEF_MOD("ssi-all", 1005, R8A7796_CLK_S3D4),
I cannot verify the parent clock, though.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
