On Thu, Feb 16, 2017 at 11:17:39AM -0500, Chris Brandt wrote: > The PL310 in the Renesas RZ/A1 SoC (R7S72100) does not have the sideband > signals connected between the CPU and L2C. According the PL310 TRM, > sideband signals are optional. > > If a PL310 is added to a system, but the sideband signals are not > connected, some Cortex A9 optimizations cannot be used. In particular, > enabling Full Line Zeros in the CA9 without sidebands connected will > crash the system since the CA9 will expect the L2C to perform operations, > yet the L2C never gets the commands. > > This series adds the option to not enable anything in the PL310 that > uses sidebands, and then adds L2C support to the RZ/A1 DT. > > v4: > * changed l2x0_bresp_dis to l2x0_bresp_disable > * changed l2x0_flz_dis to l2x0_flz_disable Looks good, thanks. I'll want to merge patch 1, but I suspect the other two patches need to go through arm-soc, which will cause a problem due to being merged independently... Arnd? -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net.
