Re: [PATCH v2] clk: renesas: mstp: ensure register writes complete

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Hi Chris,

On Mon, Feb 13, 2017 at 7:44 PM, Chris Brandt <chris.brandt@xxxxxxxxxxx> wrote:
> When there is no status bit, it is possible for the clock enable/disable
> operation to have not completed by the time the driver code resumes
> execution. This is due to the fact that write operations are sometimes
> queued and delayed internally. Doing a read ensures the write operations
> has completed.
>
> Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
> Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx>

Thanks!

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

I've regression-tested your patch on R-Car Gen1 (r8a7778/bock-w), which
also doesn't have status bits for some module clocks, and its SPI FLASH
is still identified.

Mike/Stephen: As this is a fix, can you please take it directly?
Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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