Hi! This series implements support for using RX FIFO thresholds higher than one in PIO mode on SCIF, HSCIF, SCIFA and SCIFB serial ports. This revision has been rebased onto renesas-drivers-2017-01-24-v4.10-rc5 and adds the missing changelog for "serial: sh-sci: increase RX FIFO trigger defaults for (H)SCIF" requested by Geert and Greg. CU Uli Changes since v2: - rebase - add missing changelog entry Changes since v1: - clarify HS trigger register enum - simplify DR bit handling - if() cascade -> switch() - disable RX trigger for SH77xx-style ports - clean up on failure to create sysfs attribute - r8a7796 DT: add control pins, rtscts flag Ulrich Hecht (7): serial: sh-sci: add FIFO trigger bits serial: sh-sci: consider DR (data ready) bit adequately serial: sh-sci: implement FIFO threshold register setting serial: sh-sci: increase RX FIFO trigger defaults for (H)SCIF serial: sh-sci: SCIFA/B RX FIFO software timeout serial: sh-sci: make RX FIFO parameters tunable via sysfs arm64: dts: r8a7796: salvator-x: add SCIF1 (DEBUG1) arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 14 ++ drivers/tty/serial/sh-sci.c | 273 ++++++++++++++++++--- drivers/tty/serial/sh-sci.h | 8 +- 3 files changed, 262 insertions(+), 33 deletions(-) -- 2.7.4
