Hi Linus,
On Mon, Jan 30, 2017 at 2:51 PM, Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:
> On Wed, Jan 25, 2017 at 7:09 PM, Jacopo Mondi <jacopo+renesas@xxxxxxxxxx> wrote:
>> after having discussed in great detail the RZ series per-pin PFC hardware
>> peculiarities, this is a proposal for a possible pin-based pin controller
>> driver for SoC devices of Renesas RZ family.
>>
>> This RFC series adds a minimal driver infrastructure which supports pin
>> multiplexing via explicit per-pin settings performed in device tree sources.
>
> I think this is what Laurent had in mind when he said something about
> that he should have taken the per-pin approach from day 1.
>
> I would especially like to see Laurent's review and ACK on this series
> for that reason so we don't create something less than what he is
> expecting for the future of Renesas pin control.
It depends on the actual hardware: while per-pin settings are suitable for
SoCs that have per-pin hardware configuration (e.g. RZ/A1), it's not
suitable for SoCs where that's not the case, and where the hardware has
group-wise configuration (e.g. on R-Car).
Hence IMHO "the future of Renesas pin control" will remain a split
personality for a while ;-)
Laurent: please kick me if you disagree...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
